The Rise of the Fabless Model in China
The transition from pure manufacturing dependency toward localized intellectual property generation was one of the most strategically significant themes in the later years of IIC Expo. Chinese engineering teams — initially concentrated in application design and board-level integration — began designing their own application-specific integrated circuits (ASICs) to reduce costs, own the IP stack, and compete across product categories previously dominated by international vendors.
The exhibition floor documented this transition in real time. In the early conference years, the IC design pavilion was populated almost entirely by international fabless companies presenting to Chinese manufacturer-buyers. As the decade progressed, domestic Chinese IC design houses began occupying exhibition space alongside — and increasingly in direct competition with — the international brands. The shift was commercially visible and strategically significant.
Electronic Design Automation (EDA)
EDA software vendors occupied a structurally important position at these exhibitions. Companies providing schematic capture, PCB layout, simulation, and formal verification tools presented to a rapidly expanding domestic user base of Chinese IC design engineers.
Conference sessions focused on shrinking process nodes, mixed-signal verification methodology, and SoC layout strategies for advanced nodes. Training local engineers to use these tools efficiently was a primary objective for international EDA companies that had established offices in Shanghai, Beijing, and Shenzhen. The long-term strategic implication was clear: an EDA tool adoption creates a deep technical dependency that sustains commercial relationships across many design cycles.
In the domestic context, the emergence of Chinese EDA companies attempting to serve local design teams with locally developed tools was a notable development in the latter exhibition years — one that foreshadowed current geopolitical debates about EDA technology access and sovereignty.
Foundry Relationships & Tape-Out Services
The IC Design pavilion was equally a showcase for foundry services. TSMC, UMC, SMIC, and other fabrication partners exhibited or participated in technical sessions to present their process node offerings to fabless design companies evaluating next-generation chip programs.
For emerging Chinese fabless startups, the ability to engage directly with foundry technical representatives at these events — rather than through remote negotiation processes — reduced one of the significant friction points in launching a first tape-out. Foundry companies understood this dynamic and positioned their exhibition presence accordingly: technical presentation during conference sessions, engineering meetings during the exhibition hours, and customer dinners in the evenings.
Developer Communities & Open Hardware
Beyond the commercial vendor-buyer dynamics, these conferences hosted growing developer community activity. Open-source hardware discussions, ARM architecture user groups, and early RISC-V advocacy sessions found audiences within the exhibition structure as the era progressed.
These community dimensions were commercially significant in their own right: they influenced architectural preferences, shaped developer tool ecosystems, and contributed to the talent development pipeline that underpinned China's ambitions in domestic IC development. The exhibition floor provided a physical venue for communities that were otherwise distributed across online forums and university campuses.
Exhibition Relevance: The IC Design Pavilion
The IC Design Pavilion showcased intellectual capability rather than pure manufacturing throughput. It highlighted test chips, IP core licensing arrangements, and foundry tape-out services available to emerging fabless startups. As China's domestic design community matured, the pavilion increasingly reflected local achievement — a documentation of Chinese engineering progress visible to international industry observers attending these events.